AMD PCI-X Hot Plug 8000 Chipset 8131/8132 Driver 1.4.4.0 WHQL

Issues With the PCI-X� Relaxed Ordering Bit in I/O Transactions

According to the PCI-X specification, the relaxed ordering attribute bit should not be set in I/O
requests or completions to I/O requests. However, if the PCI-X tunnel receives an I/O-space
HyperTransport read request with the RspPassPW bit set (bit 3 of the RdSized command), then the
relaxed ordering attribute bit of the corresponding PCI-X transaction is set.
Note: There are no known hosts that generate I/O-space requests in which the RspPassPW bit is set.

Also, if (1) a PCI-X master generates a peer-to-peer I/O request that passes through a HyperTransport
link and (2) the PassPW bit of the corresponding HyperTransport response is set, then the PCI-X
tunnel sets the relaxed ordering attribute bit in the corresponding PCI-X completion. Even though it is
a violation of PCI-X protocol to set the relaxed ordering attribute bit in the completion to an I/O
request, it is not a violation of HyperTransport protocol for a target to set PassPW in the response to
an I/O request. Therefore, the PCI-X tunnel should clear the relaxed ordering attribute